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12 - 16GHz Low Noise Amplifier
Description
For my graduate-level Advanced RF Design course’s final project, I designed and performed silicon layout for a CMOS 12 - 16 GHz low noise amplifier (LNA). The LNA is targeted for use in front-end receivers in satellite RF communications. It features a low noise figure (NF), >10dB power gain (S21), and high reversion isolation (S12) over the wide operational frequency range.
LNA two-stage topology
The LNA design is based off a paper from the IEEE Transactions on Microwave Theory and Techniques journal. The circuit is designed in the 65nm TSMC node and captured using Cadence schematic software. It is simulated using ADS Momentum to determine the RF performance metrics, such as S-parameters, noise figure, and linearity.
Project Takeaways
This project gave me a chance to apply the RF design and simulation knowledge I learned in the Advanced RF Design course.
- RF low noise amplifier circuit design
- Evaluating amplifier configurations
- Selecting FET W/L ratio and drain current to obtain desired gain
- Matching input impedance over frequency by selecting component values and considering device parasitics
- Analyzing tradeoffs between gain, noise, and bandwidth
- Simulating S-parameters and other RF performance metrics using ADS Momentum
- Iteratively simulating and tweaking circuit parameters to achieve desired performance
- Researching and writing technical papers
Details
The LNA uses a two-stage topology, where the first stage matches the input impedance to 50Ω, and the second stage provides high gain. The first stage achieves wideband impedance matching by establishing two resonant frequencies for the input impedance, one at the lower end of the 12 - 16GHz range, and one at the higher end. The second stage achieves wideband gain by tuning the L - C load to 15GHz, and using R to reduce the Q-factor, flattening the gain over the frequency range.
LNA schematic in Cadence
The schematic is captured in Cadence using the 65nm TSMC library. ADS Momentum is used to simulate the circuit’s power gain (S21), reverse isolation (S12), reflection coefficient (S11), noise figure, and 1dB compression point over the 12 - 16GHz range. Additionally, an initial layout of the circuit is done using Cadence layout software.
LNA performance simulated in ADS Momentum
The full details for the LNA project can be found in the paper here (.pdf). The paper includes LNA performance requirements, a discussion on various LNA topologies, a description of the design, its simulated performance, and a performance comparison to other similar LNAs.